CPO optical engines separate the photonic integrated circuit (PIC) from the electronic integrated circuit (EIC) in a 2.5D architecture. Each chiplet requires thermal management and EMI isolation.
Our multi-layer diamond lids provide all three functions in one package: thermal spreading, EMI absorption, and electrical insulation.
Silicon photonics die with modulators, detectors, and waveguides. 15×15 to 30×30mm footprint.
CMOS driver/TIA circuitry. 10×10 to 20×20mm footprint.
Multi-chip module with PIC+EIC+support dies. Up to 60×60mm total lid size.
Three functions, one diamond lid. Replaces discrete thermal interface material, EMI shield, and insulator.
Integrated temperature sensors within the diamond lid. Real-time monitoring without impacting thermal performance.
Multi-layer CVD diamond with engineered EMI absorption properties. Eliminates cross-talk between dense optical and electronic components.
Diamond is naturally electrically insulating. Provides isolation between chiplets and lid without discrete insulator layers.
| Engine Type | Typical PIC Size | 6C Lid Size | Configuration |
|---|---|---|---|
| Single PIC Chiplet | Custom per die | 8×16, 9×18, 10×20 | PIC only |
| PIC + EIC Pair | Custom per module | 8×32, 9×36, 10×40 | PIC + EIC |
| Full MCM Module | Custom per module | 8×64, 9×72, 10×80 | PIC+EIC+Support |