2025-05-29
Optical Communications Glossary
Reference guide for Co-Packaged Optics terminology, abbreviations, and concepts.
Co-Packaged Optics (CPO)
Co-Packaged Optics (CPO) is an optical interconnect technology where optical engines are placed directly adjacent to the switch ASIC inside the same package, rather than as separate pluggable modules. This approach reduces latency and power consumption for high-bandwidth AI data centers.
Key benefit: Moving optics closer to the switch reduces signal path length, enabling lower power and higher density for 51.2T+ switching systems.
Key Terms
ASIC
Application-Specific Integrated Circuit. A custom-designed chip optimized for a specific task. In CPO, the switch ASIC (e.g., Broadcom Tomahawk, NVIDIA Quantum-X) performs packet switching while optical engines handle fiber connectivity.
BDD
Boron-Doped Diamond. A type of diamond that has been doped with boron atoms, making it electrically conductive while maintaining diamond’s extreme thermal conductivity. BDD is used for heat spreaders that also absorb EMI (electromagnetic interference).
CES
Cambridge Electronic Industries (now part of Synopsis). Not to be confused with Chiplets. Context-dependent acronym.
CMIS
Common Management Interface Specification. A management protocol standard for optical modules. ELSFP-CMIS-01.0 refers to the CMIS implementation for External Light Source Fixed Pointer modules.
COUPE
Compact Ultra-dense Photonics Engine. TSMC’s silicon photonics integration platform used in NVIDIA’s Spectrum-X and Quantum-X CPO systems. Enables heterogeneous integration of EIC (electronic IC) and PIC (photonic IC) using SoIC-X packaging.
CPO
Co-Packaged Optics. See definition above.
CVD
Chemical Vapor Deposition. A method for growing diamond films by introducing carbon-containing gas (typically methane) into a chamber and using plasma to deposit carbon atoms onto a substrate. MPCVD (Microwave Plasma CVD) is 6C’s primary growth method.
DFM
Design for Manufacturing. The process of designing products to optimize manufacturing efficiency and yield.
EIC
Electronic Integrated Circuit. The CMOS portion of a chiplet-based optical engine. In NVIDIA’s COUPE architecture, the EIC handles driver/TIA circuitry for the optical modulators. Typically operates at 65nm process.
ELSFP
External Light Source Fixed Pointer. A module format where CW (continuous-wave) lasers are placed in a separate accessible module connected to the CPO switch via fiber arrays. OIF-ELSFP-02.0 is the industry standard.
GaN
Gallium Nitride. A wide-bandgap semiconductor material used for high-power, high-frequency applications. GaN-on-Diamond substrates combine GaN’s electrical properties with diamond’s thermal management.
MCM
Multi-Chip Module. An electronic assembly where multiple integrated circuits (chiplets) are packaged together. In CPO, optical engines often combine PIC + EIC + support dies in an MCM configuration.
MPCVD
Microwave Plasma Chemical Vapor Deposition. The primary method for growing high-quality single-crystal diamond. 6C uses multi-kW MPCVD reactors to produce wafer-scale diamond.
MRM
Micro-ring Modulator. A compact optical modulator used in silicon photonics. Each ring can be modulated at high speeds (e.g., 200Gb/s) to encode data on a CW laser carrier. Common in NVIDIA’s CPO implementations.
OIF
Optical Internetworking Forum. An industry consortium that develops interoperability specifications for optical networking, including the ELSFP-02.0 and CPO module standards.
PIC
Photonic Integrated Circuit. A silicon photonics chip that contains optical components (modulators, detectors, waveguides, couplers) on a single die. In CPO, the PIC handles the actual light transmission and reception.
SerDes
Serializer/Deserializer. The interface circuitry that converts parallel data streams from the switch ASIC into high-speed serial data for optical transmission, and vice versa. Modern CPO uses 100G or 200G SerDes per channel.
SCD
Single Crystal Diamond. Diamond with a continuous crystal lattice (as opposed to polycrystalline diamond). SCD has the highest thermal conductivity and is used for premium thermal management applications.
SiPh
Silicon Photonics. The technology of using silicon integrated circuit fabrication processes to create optical components. Most PICs (photonic ICs) in CPO are silicon photonics chips.
SoIC
System-on-Integrated-Chips. TSMC’s chiplet stacking technology. SoIC-X is the 3D stacking variant used in COUPE for CPO. Enables tight integration of PIC and EIC chiplets.
TIA
Transimpedance Amplifier. An amplifier circuit that converts current from a photodetector into a voltage signal. Part of the EIC in CPO optical engines.
Quick Reference Table
| Term | Full Name | Category |
|---|---|---|
| ASIC | Application-Specific Integrated Circuit | Hardware |
| BDD | Boron-Doped Diamond | Material |
| COUPE | Compact Ultra-dense Photonics Engine | Platform |
| CPO | Co-Packaged Optics | Architecture |
| CVD | Chemical Vapor Deposition | Process |
| EIC | Electronic Integrated Circuit | Component |
| ELSFP | External Light Source Fixed Pointer | Module |
| GaN | Gallium Nitride | Material |
| MCM | Multi-Chip Module | Packaging |
| MPCVD | Microwave Plasma CVD | Process |
| MRM | Micro-ring Modulator | Component |
| OIF | Optical Internetworking Forum | Organization |
| PIC | Photonic Integrated Circuit | Component |
| SerDes | Serializer/Deserializer | Interface |
| SCD | Single Crystal Diamond | Material |
| SiPh | Silicon Photonics | Technology |
| TIA | Transimpedance Amplifier | Component |
Standard Dimensions Reference
6C Technology’s standard product sizes (in mm):
| Series | Available Sizes | Typical Application |
|---|---|---|
| 8mm base | 8×16, 8×32, 8×64 | Small PIC lids, laser submounts |
| 9mm base | 9×18, 9×36, 9×72 | Medium PIC/EIC lids, ELSFP |
| 10mm base | 10×20, 10×40, 10×80 | Optical engine lids, switch baseplates |
Custom cuts available in few-mm increments from the above sizes.